IEEE - Institute of Electrical and Electronics Engineers, Inc. - Matrix Codes: Multiple Bit Upsets Tolerant Method for SRAM Memories

2007 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems

Author(s): C. Argyrides ; H.R. Zarandi ; D.K. Pradhan
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 September 2007
Conference Location: Rome, Italy
Conference Date: 26 September 2007
Page(s): 340 - 348
ISBN (Paper): 978-0-7695-2885-4
ISSN (Paper): 1550-5774
DOI: 10.1109/DFT.2007.29
Regular:

This paper presents a high level method called Matrix code to protect SRAM-based memories against multiple bit upsets. The proposed method combines hamming code and parity code to assure the... View More

Advertisement