IEEE - Institute of Electrical and Electronics Engineers, Inc. - Testing of Asynchronous NULL Conventional Logic (NCL) Circuits in Synchronous-Based Desig

2007 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems

Author(s): W.K. Al-Assadi ; S. Kakarla
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 September 2007
Conference Location: Rome, Italy
Conference Date: 26 September 2007
Page(s): 215 - 222
ISBN (Paper): 978-0-7695-2885-4
ISSN (Paper): 1550-5774
DOI: 10.1109/DFT.2007.40
Regular:

Conventional Automatic Test Pattern Generation (ATPG) algorithms would fail when applied to asynchronous circuits due to the absence of a global clock and presence of more state holding elements... View More

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