IEEE - Institute of Electrical and Electronics Engineers, Inc. - Test Generation for Single and Multiple Stuck-at Faults of a Combinational Circuit Designed by Covering Shared ROBDD with CLBs

2007 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems

Author(s): A. Matrosova ; E. Loukovnikova ; S. Ostanin ; A. Zinchuck ; E. Nikolaeva
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 September 2007
Conference Location: Rome, Italy
Conference Date: 26 September 2007
Page(s): 206 - 214
ISBN (Paper): 978-0-7695-2885-4
ISSN (Paper): 1550-5774
DOI: 10.1109/DFT.2007.42
Regular:

A combinational circuit is derived with covering the proper Shared ROBDD by CLBs in the frame of FPGA technology. Single stuck-at faults at the CLBs poles and multiple faults constituted from such... View More

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