IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 9Onm CMOS 0.28mm2 1V 12b 40MS/s ADC with 0.39pJ/Conversion-Step

2007 Symposia on VLSI Technology and Circuits

Author(s): Kang-Jin Lee ; Eun-Seok Shin ; Hee-Suk Yang ; Ju-Hwa Kim ; Pil-Un Ko ; Il-Ryong Kim ; Seung-Hoon Lee ; Kyoung-Ho Moon ; Jae-Whui Kim
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 June 2007
Conference Location: Kyoto, Japan
Conference Date: 14 June 2007
Page(s): 198 - 199
ISBN (CD): 978-4-900784-05-5
ISBN (Paper): 978-4-900784-04-8
DOI: 10.1109/VLSIC.2007.4342713
Regular:

A 1V 12b 40MS/s pipelined ADC using a proposed two stage folded cascaded opamp for low voltage and a proposed frequency compensation technique for fast settling achieves a FOM of... View More

Advertisement