IEEE - Institute of Electrical and Electronics Engineers, Inc. - Effect of shallow trench isolation induced stress on CMOS transistor mismatch

2004 IEEE International Conference on Semiconductor Electronics

Author(s): P. Beow Yew Tan ; A.V. Kordesch ; O. Sidek
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2004
Conference Location: Kuala Lumpur, Malaysia
Conference Date: 7 December 2004
ISBN (Paper): 0-7803-8658-2
DOI: 10.1109/SMELEC.2004.1620867
Regular:

Mechanical compressive stress induced by shallow trench isolation (STI) and transistor mismatch is the two important effects that we should take into account when scaling down CMOS transistors. In... View More

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