IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 1 GOPS reconfigurable signal processing IC with embedded FPGA and 3-port 1.2 GB/s flash memory subsystem

Proceedings of IEEE International Solid-State Circuits Conference

Author(s): M. Borgatti ; L. Call ; G. De Sandre ; B. Foret ; D. Iezzi ; F. Lertora ; G. Muzzi ; M. Pasotti ; M. Poles ; P.L. Rolandi
Sponsor(s): IEEE Solid-State Circuits Soc.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2003
Conference Location: San Francisco, CA, USA, USA
Conference Date: 13 February 2003
Page Count: 10
ISBN (Paper): 0-7803-7707-9
ISSN (Paper): 0193-6530
DOI: 10.1109/ISSCC.2003.1234203
Regular:

A 1 GOPS dynamically reconfigurable processing unit with embedded flash memory and SRAM-based FPGA for image/voice processing/recognition applications is described. Code, data and FPGA... View More

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