IEEE - Institute of Electrical and Electronics Engineers, Inc. - Evaluating template-based instruction compression on transport triggered architectures

Proceedings the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications

Author(s): J. Heikkinen ; T. Rantanen ; A. Cilio ; J. Takala ; H. Corporaal
Sponsor(s): IEEE Circuits & Syst. Soc.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2003
Conference Location: Calgary, Alberta, Canada, Canada
Conference Date: 2 July 2003
Page Count: 4
Page(s): 192 - 195
ISBN (Paper): 0-7695-1944-X
DOI: 10.1109/IWSOC.2003.1213033
Regular:

Program code size has become a critical design constraint of embedded systems. Code compression is one of the approaches to reduce the program code size; it results in smaller memories and reduced... View More

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