IEEE - Institute of Electrical and Electronics Engineers, Inc. - Hierarchical global floorplacement using simulated annealing and network flow area migration

6th Design Automation and Test in Europe (DATE 03)

Author(s): Wonjoon Choi ; K. Bazargan
Sponsor(s): EDAA
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2003
Conference Location: Munich, Germany, Germany
Conference Date: 7 March 2003
Page Count: 2
Page(s): 1,104 - 1,105
ISBN (Paper): 0-7695-1870-2
ISSN (Paper): 1530-1591
DOI: 10.1109/DATE.2003.1253755
Regular:

Floorplanning large designs with many hard macros and IP blocks of various sizes is becoming an increasingly important and challenging problem. This paper presents a global floorplacement method... View More

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