IEEE - Institute of Electrical and Electronics Engineers, Inc. - Folding pipeline architecture based on the least-energy algorithm for high level synthesis

Proceedings of 4th International Conference on ASIC

Author(s): Zhang Sheng ; Zhu Ning ; Zhou Runde ; Ge Yuanqing
Sponsor(s): Chinese Inst. Electron.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2001
Conference Location: Shanghai, China, China
Conference Date: 23 October 2001
Page Count: 4
Page(s): 159 - 162
ISBN (Paper): 0-7803-6677-8
DOI: 10.1109/ICASIC.2001.982521
Regular:

Pipeline architecture is very important in high level design and synthesis of digital circuits, especially for datapath design. The paper focuses on the folding pipeline architecture, presenting a... View More

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