IEEE - Institute of Electrical and Electronics Engineers, Inc. - Process Modules for High-Density Interconnects in Panel-Level Packaging

Author(s): Friedrich-Leonhard Schein ; Ruben Kahle ; Marc Kunz ; Tim Kunz ; Jordan Kossev ; Tobias Muller ; Mathias Pentz ; Michael Dietterle ; Andreas Ostmann
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2020
Volume: 10
Page(s): 5 - 10
ISSN (Electronic): 2156-3985
ISSN (Paper): 2156-3950
DOI: 10.1109/TCPMT.2019.2956325
Regular:

Advanced packaging technologies like wafer-level fan-out and 3-D system-in-package (3-D SIP) are rapidly penetrating the market of electronic components. For cost reduction, one approach is the... View More

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