IEEE - Institute of Electrical and Electronics Engineers, Inc. - A Binary Line Buffer Circuit Featuring Lossy Data Compression at Fixed Maximum Data Rate

Author(s): Ettore Napoli ; Davide De Caro ; Nicola Petra ; Antonio Giuseppe Maria Strollo
Sponsor(s): IEEE Circuits and Systems Society
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2020
Volume: 67
Page(s): 121 - 134
ISSN (Electronic): 1558-0806
ISSN (Paper): 1549-8328
DOI: 10.1109/TCSI.2019.2941703
Regular:

Video processing requires an increasing amount of buffered data. The paper proposes a multi-line buffer circuit that stores compressed data thus saving logic and power. The lossy compression... View More

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