IEEE - Institute of Electrical and Electronics Engineers, Inc. - Bulkyflip: A NAND-SPIN-Based Last-Level Cache With Bandwidth-Oriented Write Management Policy

Author(s): Bi Wu ; Weisheng Zhao ; Xiaobo Sharon Hu ; Pengcheng Dai ; Zhaohao Wang ; Chao Wang ; Ying Wang ; Jianlei Yang ; Yuanqing Cheng ; Dijun Liu ; Youguang Zhang
Sponsor(s): IEEE Circuits and Systems Society
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2020
Volume: 67
Page(s): 108 - 120
ISSN (Electronic): 1558-0806
ISSN (Paper): 1549-8328
DOI: 10.1109/TCSI.2019.2947242
Regular:

High capacity last-level caches (LLCs) are being used to help alleviate the growing speed gap between the processor and main memory. However, traditional CMOS based memory technologies (SRAM,... View More

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