IEEE - Institute of Electrical and Electronics Engineers, Inc. - A Dual-Split 6T SRAM-Based Computing-in-Memory Unit-Macro With Fully Parallel Product-Sum Operation for Binarized DNN Edge Processors

Author(s): Xin Si ; Meng-Fan Chang ; Win-San Khwa ; Jia-Jing Chen ; Jia-Fang Li ; Xiaoyu Sun ; Rui Liu ; Shimeng Yu ; Hiroyuki Yamauchi ; Qiang Li
Sponsor(s): IEEE Circuits and Systems Society
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 November 2019
Volume: 66
Page(s): 4,172 - 4,185
ISSN (Electronic): 1558-0806
ISSN (Paper): 1549-8328
DOI: 10.1109/TCSI.2019.2928043
Regular:

Computing-in-memory (CIM) is a promising approach to reduce the latency and improve the energy efficiency of deep neural network (DNN) artificial intelligence (AI) edge processors. However,... View More

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