IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 12-Bit Time-Interleaved 400-MS/s Pipelined ADC With Split-ADC Digital Background Calibration in 4,000 Conversions/Channel

Author(s): Tsung-Chih Hung ; Fan-Wei Liao ; Tai-Haur Kuo
Sponsor(s): IEEE Circuits and Systems Society
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 November 2019
Volume: 66
Page(s): 1,810 - 1,814
ISSN (Electronic): 1558-3791
ISSN (Paper): 1549-7747
DOI: 10.1109/TCSII.2019.2895694
Regular:

Split analog-to-digital converter (ADC) digital background calibration with full-input-range error detection schemes is proposed to rapidly correct the gain and nonlinearity errors in the... View More

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