IEEE - Institute of Electrical and Electronics Engineers, Inc. - A CMOS Majority Logic Gate and its Application to One-Step ML Decodable Codes

Author(s): Jing Guo ; Shanshan Liu ; Lei Zhu ; Fabrizio Lombardi
Sponsor(s): IEEE Computer Society
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 November 2019
Volume: 27
Page(s): 2,620 - 2,628
ISSN (Electronic): 1557-9999
ISSN (Paper): 1063-8210
DOI: 10.1109/TVLSI.2019.2924721
Regular:

The majority logic (ML) gate (MLG) is required in fast decoder implementations to protect memories from transient soft errors. In this paper, a novel MLG design is proposed; it consists of a pMOS... View More

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