IEEE - Institute of Electrical and Electronics Engineers, Inc. - An Efficient Pipelined Architecture for Superconducting Single Flux Quantum Logic Circuits Utilizing Dual Clocks

Author(s): Ghasem Pasandi ; Massoud Pedram
Sponsor(s): Council on Superconductivity
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Volume: PP
Page(s): 1
ISSN (CD): 2378-7074
ISSN (Electronic): 1558-2515
ISSN (Paper): 1051-8223
DOI: 10.1109/TASC.2019.2955095
Regular:

In standard Single Flux Quantum (SFQ) logic circuits, it is required to insert path balancing D-Flip-Flops (DFFs) to guarantee correct circuit operation. DFF insertion should be done in a way that... View More

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