IEEE - Institute of Electrical and Electronics Engineers, Inc. - Low-Power, High-Sensitivity Readout Integrated Circuit With Clock-Gating, Double-Edge-Triggered Flip-Flop for Mid-Wavelength Infrared Focal-Plane Arrays

Author(s): Chi Yeon Kim ; Hee Chul Lee
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 September 2019
Volume: 3
Page(s): 1 - 4
ISSN (Electronic): 2475-1472
DOI: 10.1109/LSENS.2019.2936934
Regular:

To facilitate a high-dynamic-range operation of mid-wavelength infrared focal-plane arrays, a low-power, high-sensitivity readout integrated circuit (ROIC) is proposed. In this ROIC, the... View More

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