IEEE - Institute of Electrical and Electronics Engineers, Inc. - Code Layout Optimization for Near-Ideal Instruction Cache

Author(s): Ali Ansari ; Pejman Lotfi-Kamran ; Hamid Sarbazi-Azad
Sponsor(s): IEEE Computer Society
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Volume: PP
Page(s): 1
ISSN (CD): 2473-2575
ISSN (Electronic): 1556-6064
ISSN (Paper): 1556-6056
DOI: 10.1109/LCA.2019.2924429
Regular:

Instruction cache misses are a major source of performance degradation in server workloads because of their large instruction footprints and complex control flow. Due to the importance of reducing... View More

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