IEEE - Institute of Electrical and Electronics Engineers, Inc. - ATPG and Test Compression for Probabilistic Circuits

2019 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)

Author(s): Kai-Chieh Yang ; Ming- Ting Lee ; Chen-Hung Wu ; James Chien-Mo Li
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 April 2019
Conference Location: Hsinchu, Taiwan, Taiwan
Conference Date: 22 April 2019
Page(s): 1 - 4
ISBN (Electronic): 978-1-7281-0655-7
ISSN (Electronic): 2472-9124
DOI: 10.1109/VLSI-DAT.2019.8741869
Regular:

Unlike testing deterministic circuits, where each test pattern is applied only once, testing probabilistic circuits requires multiple pattern repetitions for each test pattern. In this paper, we... View More

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