IEEE - Institute of Electrical and Electronics Engineers, Inc. - Design of an Adaptive and Reliable Network on Chip Router Architecture Using FPGA

2019 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)

Author(s): Khyamling Parane ; B. M Prabhu Prasad ; Basavaraj Talawar
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 April 2019
Conference Location: Hsinchu, Taiwan, Taiwan
Conference Date: 22 April 2019
Page(s): 1 - 4
ISBN (Electronic): 978-1-7281-0655-7
ISSN (Electronic): 2472-9124
DOI: 10.1109/VLSI-DAT.2019.8741845
Regular:

We propose an adaptive, low cost, reliable and high performance router implemented based on a conventional two stage pipeline. The proposed Adaptive routing operates in adaptive mode as soon as... View More

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