IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 16-bit 2.0-ps Resolution Two-Step TDC in 0.18- $\mu$ m CMOS Utilizing Pulse-Shrinking Fine Stage With Built-In Coarse Gain Calibration

Author(s): Ryuichi Enomoto ; Tetsuya Iizuka ; Takehisa Koga ; Toru Nakura ; Kunihiro Asada
Sponsor(s): IEEE Computer Society
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2019
Volume: 27
Page(s): 11 - 19
ISSN (Electronic): 1557-9999
ISSN (Paper): 1063-8210
DOI: 10.1109/TVLSI.2018.2867505
Regular:

This paper proposes a time-to-digital converter (TDC) that achieves wide input range and fine time resolution at the same time. The proposed TDC utilizes pulse-shrinking (PS) scheme in the second... View More

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