IEEE - Institute of Electrical and Electronics Engineers, Inc. - Simulation and Experimental Study of the Warpage of Fan-out Wafer-level Packaging: The Effect of the Manufacturing Process and Optimal Design

Author(s): Mei-Ling Wu ; Jia-Shen Lan
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Volume: PP
Page(s): 1
ISSN (Electronic): 2156-3985
ISSN (Paper): 2156-3950
DOI: 10.1109/TCPMT.2018.2889930
Regular:

In this research, the warpage of fan-out wafer level packaging (FOWLP) throughout the manufacturing process is investigated to minimize warpage. FOWLP technology has the advantages of low cost,... View More

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