IEEE - Institute of Electrical and Electronics Engineers, Inc. - Design of a Bit Error Ratio Testing and Error Correction System Based on High-Speed Serial Interface

2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT)

Author(s): Lingjun Zhu ; Jian Wang ; Jinmei Lai
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 October 2018
Conference Location: Qingdao, China, China
Conference Date: 31 October 2018
Page(s): 1 - 3
ISBN (CD): 978-1-5386-4439-3
ISBN (Electronic): 978-1-5386-4441-6
ISBN (Paper): 978-1-5386-4440-9
DOI: 10.1109/ICSICT.2018.8564934
Regular:

This paper presents the design and implementation of a Bit Error Ratio Testing (BERT) and error correction system based on high-speed serial interfaces. On-chip and off-chip loopback methods are... View More

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