IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 0.032-mm2 Fully-Integrated Low-Power Phase-Locked Loop Based on Passive Dual-Path Loop Filter

2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT)

Author(s): Fangbo Li ; Li Ding ; Jing Jin
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 October 2018
Conference Location: Qingdao, China, China
Conference Date: 31 October 2018
Page(s): 1 - 3
ISBN (CD): 978-1-5386-4439-3
ISBN (Electronic): 978-1-5386-4441-6
ISBN (Paper): 978-1-5386-4440-9
DOI: 10.1109/ICSICT.2018.8565802
Regular:

This paper presents a low-power and area-efficient PLL-based frequency synthesizer. The area-saving technique is based on dual-path loop filter which involves no additional active components... View More

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