IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 781Mbps-5Gbps DLL-Based CDR with Starting-Control Circuit

2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT)

Author(s): Cheng Li ; Yuequan Liu ; Song Jia ; Yuan Wang
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 October 2018
Conference Location: Qingdao, China, China
Conference Date: 31 October 2018
Page(s): 1 - 3
ISBN (CD): 978-1-5386-4439-3
ISBN (Electronic): 978-1-5386-4441-6
ISBN (Paper): 978-1-5386-4440-9
DOI: 10.1109/ICSICT.2018.8565652
Regular:

This paper presents a 781 Mbps-5 Gbps wide-range clock and data recovery (CDR) circuit combined delay-locked loop (DLL). A novel starting-control circuit is introduced to solve the inherent... View More

Advertisement