IEC - International Electrotechnical Commission - IEC 63011-1:2018
Integrated circuits - Three dimensional integrated circuits - Part 1: Terminology
published
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| Organization: | IEC - International Electrotechnical Commission |
| Publication Date: | 28 November 2018 |
| Status: | published |
| Page Count: | 24 |
| ICS Code (Integrated circuits. Microelectronics): | 31.200 |
abstract:
IEC 63011-1:2018 provides definitions pertaining to multichip integrated circuits, as vertically stacked dies using through-silicon vias (TSVs) or micro bumps. Terms and definitions related to the... View More
Document History
IEC 63011-1:2018
November 28, 2018
Integrated circuits - Three dimensional integrated circuits - Part 1: Terminology
IEC 63011-1:2018 provides definitions pertaining to multichip integrated circuits, as vertically stacked dies using through-silicon vias (TSVs) or micro bumps. Terms and definitions related to the...