IEEE - Institute of Electrical and Electronics Engineers, Inc. - Optimization of the Load Balancing Policy for Tiled Many-core Processors

Author(s): Ye Liu ; Shinpei Kato ; Masato Edahiro
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Volume: PP
Page(s): 1
ISSN (Electronic): 2169-3536
DOI: 10.1109/ACCESS.2018.2883415
Regular:

Tiled many-core processors (i.e., KNL and the TILE-Gx72 processor), on which processing cores are fitted onto a single chip and cores are interconnected via mesh-based networks, are different from... View More

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