IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 0.029MM2 17-FJ/Conv.-Step CT $\Delta\Sigma$ ADC with 2nd-Order Noise-Shaping SAR Quantizer

2018 IEEE Symposium on VLSI Circuits

Author(s): Jiaxin Liu ; Shaolan Li ; Wenjuan Guo ; Guangjun Wen ; Nan Sun
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 June 2018
Conference Location: Honolulu, HI, USA
Conference Date: 18 June 2018
Page(s): 201 - 202
ISBN (Electronic): 978-1-5386-4214-6
DOI: 10.1109/VLSIC.2018.8502424
Regular:

This paper presents a compact and power-efficient 3rd-order CT ΔΣ ADC with a single OTA. A 4-b fully-passive 2nd-order noise-shaping SAR ADC is employed as the... View More

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