IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 4096-Neuron 1M-Synapse 3.8PJ/SOP Spiking Neural Network with On-Chip STDP Learning and Sparse Weights in 10NM FinFET CMOS

2018 IEEE Symposium on VLSI Circuits

Author(s): Gregory K. Chen ; Raghavan Kumar ; H. Ekin Sumbul ; Phil C. Knag ; Ram K. Krishnamurthy
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 June 2018
Conference Location: Honolulu, HI, USA
Conference Date: 18 June 2018
Page(s): 255 - 256
ISBN (Electronic): 978-1-5386-4214-6
DOI: 10.1109/VLSIC.2018.8502423
Regular:

A 4096-neuron, 1M-synapse SNN in 10nm FinFET CMOS achieves a peak throughput of 25.2GSOP/s at 0.9V, peak energy efficiency of 3.8pJ/SOP at 525mV, and 2.3μW/neuron operation at 450mV. The SNN... View More

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