IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 1.25MS/S Two-Step Incremental ADC with 100DB DR and 110DB SFDR

2018 IEEE Symposium on VLSI Circuits

Author(s): Takato Katayama ; Shiko Miyashita ; Kazuki Sobue ; Koichi Hamashita
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 June 2018
Conference Location: Honolulu, HI, USA
Conference Date: 18 June 2018
Page(s): 205 - 206
ISBN (Electronic): 978-1-5386-4214-6
DOI: 10.1109/VLSIC.2018.8502298
Regular:

This paper presents a two-step incremental ADC (IADC) with extended counting. The proposed IADC has only one active integrator in the two-step conversion cycle. To achieve high accuracy without... View More

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