IEEE - Institute of Electrical and Electronics Engineers, Inc. - A Scalable Multi- TeraOPS Deep Learning Processor Core for AI Trainina and Inference

2018 IEEE Symposium on VLSI Circuits

Author(s): Bruce Fleischer ; Sunil Shukla ; Matthew Ziegler ; Joel Silberman ; Jinwook Oh ; Vijavalakshmi Srinivasan ; Jungwook Choi ; Silvia Mueller ; Ankur Agrawal ; Tina Babinsky ; Nianzheng Cao ; Chia-Yu Chen ; Pierce Chuang ; Thomas Fox ; George Gristede ; Michael Guillorn ; Howard Haynie ; Michael Klaiber ; Dongsoo Lee ; Shih-Hsien Lo ; Gary Maier ; Michael Scheuermann ; Swagath Venkataramani ; Christos Vezyrtzis ; Naigang Wang ; Fanchieh Yee ; Ching Zhou ; Pong-Fei Lu ; Brian Curran ; Lel Chang ; Kailash Gopalakrishnan
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 June 2018
Conference Location: Honolulu, HI, USA
Conference Date: 18 June 2018
Page(s): 35 - 36
ISBN (Electronic): 978-1-5386-4214-6
DOI: 10.1109/VLSIC.2018.8502276
Regular:

A multi-TOPS AI core is presented for acceleration of deep learning training and inference in systems from edge devices to data centers. With a programmable architecture and custom ISA, this... View More

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