IEEE - Institute of Electrical and Electronics Engineers, Inc. - Sticker: A 0.41-62.1 TOPS/W 8Bit Neural Network Processor with Multi-Sparsity Compatible Convolution Arrays and Online Tuning Acceleration for Fully Connected Layers

2018 IEEE Symposium on VLSI Circuits

Author(s): Zhe Yuan ; Jinshan Yue ; Huanrui Yang ; Zhibo Wang ; Jinyang Li ; Yixiong Yang ; Qingwei Guo ; Xueqing Li ; Meng-Fan Chang ; Huazhong Yang ; Yongpan Liu
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 June 2018
Conference Location: Honolulu, HI, USA
Conference Date: 18 June 2018
Page(s): 33 - 34
ISBN (Electronic): 978-1-5386-4214-6
DOI: 10.1109/VLSIC.2018.8502404
Regular:

Neural Networks (NNs) have emerged as a fundamental technology for machine learning. The sparsity of weight and activation in NNs varies widely from 5%-90% and can potentially lower computation... View More

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