IEEE - Institute of Electrical and Electronics Engineers, Inc. - Phase Noise and Frequency Stability of the Red-Pitaya Internal PLL

Author(s): A. C. Cardenas Olaya ; C. E. Calosso ; J.-M. Friedt ; S. Micalizio ; E. Rubiola
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Volume: PP
Page(s): 1
ISSN (Electronic): 1525-8955
ISSN (Paper): 0885-3010
DOI: 10.1109/TUFFC.2018.2883830
Regular:

In Field Programmable Gate Array platforms, the main clock is generally a low-cost quartz oscillator whose stability is of the order of 10-9 to 10-10 in the short term and 10-7 to 10-8 in the... View More

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