p id="s00002">1.1 This practice covers the marking of medical devices and other items to indicate their safety in the magnetic resonance (MR) environment.

1.2 The purpose of this practice is to (1) recommend that items that may be brought into the MR en...

Concurrent programs written in a machine level language are being used in many areas but verification of such programs brings new challenges to the programming language community. Most of the studies in the literature on verifying the safety properties of concurrent programs are for high-level langu...

In the course of high-level synthesis of integrate circuit, the hard-to-test structure caused by irrational schedule and allocation reduces the testability of circuit. In order to improve the circuit testability, this paper proposes a weighted compatibility graph (WCG), which provides a weighted for...

This paper presents a fault-tolerant computer system. It is designed as a double 2-out-of-2 architecture based on component redundant technique. Also, a quantitative probabilistic model is presented for evaluating the reliability, availability, maintainability and safety (RAMS) of this architecture....

Scheduling is an important step in high-level synthesis and can greatly influence the testability of the synthesized circuits. This paper presents an efficient testability-improved data path scheduling scheme based on mobility scheduling, in which the scheduling begins from the operation with least ...