IEEE - Institute of Electrical and Electronics Engineers, Inc. - Modeling Power Vertical High-k MOS Device With Interface Charges via Superposition Methodology-Breakdown Voltage and Specific on-Resistance

Author(s): Zhigang Wang ; Xi Wang ; James B. Kuo
Sponsor(s): IEEE Electron Devices Society
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Volume: PP
Page(s): 1 - 8
ISSN (Electronic): 1557-9646
ISSN (Paper): 0018-9383
DOI: 10.1109/TED.2018.2870174
Regular:

An analytical model for the power vertical MOS device with a high-k insulating dielectric (HKMOS) is derived via the superposition methodology on the condition of punchthrough. Considering three... View More

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