IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 0.0056-mm² -249-dB-FoM All-Digital MDLL Using a Block-Sharing Offset-Free Frequency-Tracking Loop and Dual Multiplexed-Ring VCOs

Author(s): Shiheng Yang ; Jun Yin ; Pui-In Mak ; Rui P. Martins
Sponsor(s): IEEE Solid-State Circuits Society
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Volume: PP
Page(s): 1 - 11
ISSN (Electronic): 1558-173X
ISSN (Paper): 0018-9200
DOI: 10.1109/JSSC.2018.2870551
Regular:

This paper describes an ultra-compact all-digital multiplying delay-locked loop (MDLL) featuring a low-power block-sharing offset-free frequency-tracking loop (FTL) to calibrate the... View More

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