IEEE - Institute of Electrical and Electronics Engineers, Inc. - Novel Low Cost, Double-and-Triple-Node-Upset-Tolerant Latch Designs for Nano-scale CMOS

Author(s): Aibin Yan ; Chaoping Lai ; Yinlei Zhang ; Jie Cui ; Zhengfeng Huang ; Jie Song ; Jing Guo ; Xiaoqing Wen
Sponsor(s): IEEE Computer Society
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Volume: PP
Page(s): 1
ISSN (CD): 2376-4562
ISSN (Electronic): 2168-6750
DOI: 10.1109/TETC.2018.2871861
Regular:

This paper presents two novel low cost, double-and-triple-node-upset tolerant latch designs. First, a novel low cost and double-node-upset (DNU) completely tolerant (LCDNUT) latch design is... View More

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