IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 5-10-Gb/s 12.5-mW Source Synchronous I/O Interface With 3-D Flip Chip Package

Author(s): Shunli Ma ; Hao Yu ; Qun Jane Gu ; Junyan Ren
Sponsor(s): IEEE Circuits and Systems Society
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Volume: PP
Page(s): 1 - 14
ISSN (Electronic): 1558-0806
ISSN (Paper): 1549-8328
DOI: 10.1109/TCSI.2018.2867623
Regular:

This paper presents an energy-efficient I/O interface with a 3-D flip chip package. The I/O interface is composed of a transmitter and a receiver. The transmitter consists of a pseudo-random bit... View More

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