IEEE - Institute of Electrical and Electronics Engineers, Inc. - A Parallel Face Detection System Implemented on FPGA

2007 IEEE International Symposium on Circuits and Systems (ISCAS)

Author(s): N. Farrugia ; F. Mamalet ; S. Roux ; Fan Yang ; M. Paindavoine
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 May 2007
Conference Location: New Orleans, LA, USA
Conference Date: 27 May 2007
Page(s): 3,704 - 3,707
ISBN (CD): 1-4244-0921-7
ISBN (Paper): 1-4244-0920-9
ISSN (Electronic): 2158-1525
ISSN (Paper): 0271-4302
DOI: 10.1109/ISCAS.2007.378647
Regular:

In this paper, we introduce a methodology for designing a system for face detection and its implementation on FPGA. The chosen face detection method is the well-known convolutional face finder... View More

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