IEEE - Institute of Electrical and Electronics Engineers, Inc. - An Architecture For Integrating Low Complexity and Reconfigurability for Channel filters in Software Defined Radio Receivers

2007 IEEE International Symposium on Circuits and Systems (ISCAS)

Author(s): R. Mahesh ; A.P. Vinod
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 May 2007
Conference Location: New Orleans, LA, USA
Conference Date: 27 May 2007
Page(s): 2,514 - 2,517
ISBN (CD): 1-4244-0921-7
ISBN (Paper): 1-4244-0920-9
ISSN (Electronic): 2158-1525
ISSN (Paper): 0271-4302
DOI: 10.1109/ISCAS.2007.378750
Regular:

The most computationally demanding block in the digital front end of a software defined radio (SDR) receiver is the channelizer which operates at the highest sampling rate. Reconfigurability and... View More

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