IEEE - Institute of Electrical and Electronics Engineers, Inc. - Embedded Chip Build-Up in a Wafer-Level Packaging Environment

2007 Electronic Components and Technology Conference

Author(s): C.E. Bauer ; H.J. Neuhaus
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 May 2007
Conference Location: Reno, NV, USA
Conference Date: 29 May 2007
Page(s): 1,308 - 1,312
ISBN (CD): 1-4244-0985-3
ISBN (Paper): 1-4244-0984-5
ISSN (Paper): 0569-5503
DOI: 10.1109/ECTC.2007.373964
Regular:

Embedded chip build-up technology maintains compatibility with both printed circuit panel and wafer-level packaging infrastructures. In this paper the authors present a detailed infrastructure and... View More

Advertisement