IEEE - Institute of Electrical and Electronics Engineers, Inc. - Activity-Aware Registers Placement for Low Power Gated Clock Tree Construction

IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07). Emerging VLSI Technologies and Architectures

Author(s): Weixiang Shen ; Yici Cai ; Xianlong Hong ; Jiang Hu
Sponsor(s): IEEE Comput. Soc. Tech. Comm. VLSI
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 March 2007
Conference Location: Porto Alegre, Brazil
Conference Date: 9 March 2007
Page(s): 383 - 388
ISBN (Paper): 0-7695-2896-1
DOI: 10.1109/ISVLSI.2007.20
Regular:

As power consumption of the clock tree dominates over 40% of the total power in modern high performance VLSI designs, measures must be taken to keep it under control. One of the most effective... View More

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