IEEE - Institute of Electrical and Electronics Engineers, Inc. - Hierarchical Concurrent Congestion and Wirelength Estimation in the Presence of IP Blocks

IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07). Emerging VLSI Technologies and Architectures

Author(s): T. Taghavi ; M. Sarrafzadeh
Sponsor(s): IEEE Comput. Soc. Tech. Comm. VLSI
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 March 2007
Conference Location: Porto Alegre, Brazil
Conference Date: 9 March 2007
Page(s): 213 - 218
ISBN (Paper): 0-7695-2896-1
ISSN (Electronic): 2159-3477
ISSN (Paper): 2159-3469
DOI: 10.1109/ISVLSI.2007.48
Regular:

With the increasing sophistication of circuits and specifically in the presence of IP blocks, new estimation methods are needed in the design flow of large-scale circuits. Up to now, a number of... View More

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