IEEE - Institute of Electrical and Electronics Engineers, Inc. - A Novel Methodology for Temperature-Aware Placement and Routing of FPGAs

IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07). Emerging VLSI Technologies and Architectures

Author(s): K. Siozios ; D. Soudris
Sponsor(s): IEEE Comput. Soc. Tech. Comm. VLSI
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 March 2007
Conference Location: Porto Alegre, Brazil
Conference Date: 9 March 2007
Page(s): 55 - 60
ISBN (Paper): 0-7695-2896-1
DOI: 10.1109/ISVLSI.2007.11
Regular:

Shrinking silicon technologies, increasing logic densities and clock frequencies on FPGA lead to rapid elevation in power density, which are translated to higher on-chip temperature. Recently, the... View More

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