IEEE - Institute of Electrical and Electronics Engineers, Inc. - High-Level Power Estimation and Low-Power Design Space Exploration for FPGAs

2007 Asia and South Pacific Design Automation Conference

Author(s): Deming Chen ; Jason Cong ; Yiping Fan ; Zhiru Zhang
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2007
Conference Location: Yokohama, Japan
Conference Date: 23 January 2007
Page(s): 529 - 534
ISBN (CD): 1-4244-0630-7
ISBN (Paper): 1-4244-0629-3
DOI: 10.1109/ASPDAC.2007.358040
Regular:

In this paper, we present a simultaneous resource allocation and binding algorithm for FPGA power minimization. To fully validate our methodology and result, our work targets a real FPGA... View More

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