IEEE - Institute of Electrical and Electronics Engineers, Inc. - Passive Interconnect Macromodeling Via Balanced Truncation of Linear Systems in Descriptor Form

2007 Asia and South Pacific Design Automation Conference

Author(s): Boyuan Yan ; S.X.-D. Tan ; Pu Liu ; B. McGaughy
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2007
Conference Location: Yokohama, Japan
Conference Date: 23 January 2007
Page(s): 355 - 360
ISBN (CD): 1-4244-0630-7
ISBN (Paper): 1-4244-0629-3
DOI: 10.1109/ASPDAC.2007.358011
Regular:

In this paper, we present a novel passive model order reduction (MOR) method via projection-based truncated balanced realization method, PriTBR, for large RLC interconnect circuits. Different from... View More

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