IEEE - Institute of Electrical and Electronics Engineers, Inc. - Modeling Sub-90nm On-Chip Variation Using Monte Carlo Method for DFM

2007 Asia and South Pacific Design Automation Conference

Author(s): J.-F. Huang ; V.C.Y. Chang ; S. Liu ; K.Y.Y. Doong ; K.-J. Chang
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2007
Conference Location: Yokohama, Japan
Conference Date: 23 January 2007
Page(s): 221 - 225
ISBN (CD): 1-4244-0630-7
ISBN (Paper): 1-4244-0629-3
ISSN (Electronic): 2153-697X
ISSN (Paper): 2153-6961
DOI: 10.1109/ASPDAC.2007.357989
Regular:

For sub-90nm technology nodes and below, random fluctuations of within-die physical process properties are also known as random on-chip variation (OCV). It impacts on the VLSI/SoC design yields... View More

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