IEEE - Institute of Electrical and Electronics Engineers, Inc. - Compact FPGA-based systolic array architecture suitable for vision systems

2007 4th International Conference on Information Technology New Generations

Author(s): G. Saldana ; M. Arias-Estrada
Sponsor(s): Premier Hall for Sci. and Eng
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 April 2007
Conference Location: Las Vegas, NV, USA
Conference Date: 2 April 2007
Page(s): 1,008 - 1,013
ISBN (Paper): 0-7695-2776-0
DOI: 10.1109/ITNG.2007.209
Regular:

Motion estimation constitutes a significant computational part of video compression standards such as MPEG4. The present work focuses on the development of a reconfigurable systolic-based... View More

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