IEEE - Institute of Electrical and Electronics Engineers, Inc. - Analytical Modeling of Hot-Carrier Induced Degradation of MOS Transistor for Analog Design for Reliability

2007 IEEE International Symposium on Quality of Electronic Design

Author(s): B. Dubois ; J.B. Kammerer ; L. Hebrard ; F. Braun
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 March 2007
Conference Location: San Jose, CA, USA
Conference Date: 26 March 2007
Page(s): 53 - 58
ISBN (Paper): 0-7695-2795-7
DOI: 10.1109/ISQED.2007.37
Regular:

A CMOS transistor ageing analytical model is presented and the procedure that allows to extract its parameters is proposed in this paper. By using a simple, example, we show how such a model can... View More

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