IEEE - Institute of Electrical and Electronics Engineers, Inc. - Tradeoff between complexity and memory size in the 3GPP enhanced aacPlus decoder: Speed-conscious and memory-conscious decoders on a 16-bit fixed-point DSP

2006 14th European Signal Processing Conference

Author(s): Osamu Shimada ; Toshiyuki Nomura ; Akihiko Sugiyama ; Masahiro Serizawa
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 September 2006
Conference Location: Florence, Italy
Conference Date: 4 September 2006
Page(s): 1 - 5
ISSN (Paper): 2219-5491
Regular:

This paper investigates tradeoff between complexity and memory size in the 3GPP enhanced aacPlus decoder based on 16-bit fixed-point DSP implementation. In order to investigate this tradeoff, the... View More

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